RISC-V Declares the Data Center Era Open

RISC-V chairman Krste Asanović declares the open-standard ISA ready for data centers as Qualcomm, Nvidia, Meta, Google, and Alibaba build next-gen RISC-V processors.

The open-standard RISC-V instruction set architecture is officially moving beyond embedded devices and into the data center. At the RISC-V Summit Europe in Munich, chairman Krste Asanović delivered a keynote that left no ambiguity: the architecture is now competing directly with x86 and Arm for enterprise server workloads.

Qualcomm, Nvidia, Meta, Google, and Alibaba are all building RISC-V into their next-generation processors. Several hyperscalers and data center owners are already co-designing chips based on RVA23, the profile standard approved in October 2024 that unifies hardware and software under a common specification.

"This alignment allows developers to test their software directly on real hardware instead of using emulators," Asanović said. "The RVA23 profile serves as a stable base for the software ecosystem to target."

To close the performance gap with proprietary architectures, Asanović introduced "optimization guidance options" — new ISA extensions like Oilsm and Ovlt that set clear hardware performance expectations. These tell software developers they can rely on fast, native execution rather than slow trap-and-emulate workarounds, while pressuring hardware vendors to compete on implementation quality rather than paper specifications.

The security story is maturing in parallel. The consortium is advancing the Capability Hardware Enhanced RISC Instructions (CHERI) framework, which builds fine-grained memory safety directly into the processor — addressing entire classes of software vulnerabilities at the hardware level. Combined with supervisor domains for confidential computing, the platform is assembling the security guarantees enterprise buyers demand.

As generative AI reshapes computing demand, RISC-V's modularity gives it a structural advantage. The architecture can serve as an AI Host ISA, a device-level AI ISA, or a fully self-hosted AI system scaling down to embedded devices — all sharing the same software toolchain.

Sources: Summit Keynote — YouTube · SiFive: An Ecosystem Coming of Age